This invention relates to the field of integrated circuits and more specifically to a lateral bipolar transistor and a method of manufacture.
The growth of the wireless communication market has lead to the demand for integrated circuits that are needed for high speed, high drive, mixed-voltage and analog-digital applications. These include products such as mixers, low noise amplifiers, voltage controlled oscillators, and also analog-to-digital and digital-to-analog converters, as well as synthesizers. This demand has lead to research for bipolar transistors such as lateral PNPs that can be produced in a cost-effective manner utilizing Bipolar-CMOS (BiCMOS) techniques.
Current standard sub-micron BiCMOS techniques are unable to build low-cost lateral PNPs. One reason is that standard BiCMOS technologies for making a lateral PNP is based upon the formation of a retrograde well underlying the base, collector and emitter region. This results in a device having an unsuitably low current gain due to the large base width and doping concentration. Additionally, the manufacture of lateral PNPs using conventional BiCMOS methods requires additional process steps above and beyond those required to make other devices. This leads to increased costs.
Attempts have been made to increase the current gain in lateral PNPs by using separate gate controls to turn on parasitic PMOS in the lateral PNP structure. However, this leads to a four terminal device and is difficult to use in most applications.
Thus, there is a need for a lateral PNP that has both a high current gain and can be manufactured without the addition of manufacturing steps.